Design technologies for integrated systems

CS-472 / 6 crédits

Enseignant: De Micheli Giovanni

Langue: Anglais

Summary

Hardware compilation is the process of transforming specialized hardware description languages into circuit descriptions, which are iteratively refined, detailed and optimized. The course presents algorithms, tools and methods for hardware compilation and logic synthesis.

Content

The course will present the most outstanding features of hardware compilation, as well as the techniques for optimizing logic representations and networks. The course gives a novel, uptodate view of digital circuit design. Practical sessions will teach students the use of current design tools.Syllabus1) Modeling languages and specification formalisms;2) High-level synthesis and optimization methods (scheduling, binding, data-path and control synthesis);3) Representation and optimization of combinational logic functions (encoding problems, binary decision diagrams);4) Representation and optimization of multiple-level networks (algebraic and Boolean methods, "don't care" set computation, timing verification and optimization);5) Modeling and optimization of sequential functions and networks (retiming);6) Semicustom libraries and library binding.

Keywords

Hardware, VLSI, Synthesis, Optimization, Algorithms

Learning Prerequisites

Required courses

No specific course

Recommended courses

Good knowledge of digital design, algorithm design and programming.

Important concepts to start the course

Good knowledge of digital design, algorithm design and programming.

Learning Outcomes

By the end of the course, the student must be able to:

  • Recognize important problems in digital design
  • Examine and evaluate available design tools and methods
  • Decide upon a design tool flow to perform a digital design

Transversal skills

  • Plan and carry out activities in a way which makes optimal use of available time and other resources.

Assessment methods

Continuous control :
Homework : 30 %, Project 10 %, Midterm test : 25 %,
End term test : 35 %

Resources

Bibliography

G. De Micheli, Synthesis and Optimization of Digital Circuits, McGraw'Hill.

Ressources en bibliothèque

Moodle Link

Dans les plans d'études

  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: obligatoire
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel
  • Semestre: Automne
  • Forme de l'examen: Pendant le semestre (session d'hiver)
  • Matière examinée: Design technologies for integrated systems
  • Cours: 3 Heure(s) hebdo x 14 semaines
  • Labo: 2 Heure(s) hebdo x 14 semaines
  • Type: optionnel

Semaine de référence

Cours connexes

Résultats de graphsearch.epfl.ch.