Advanced computer architecture

Summary

This course explores techniques for exploiting instruction-level parallelism both statically and dynamically. It also addresses the generation of hardware accelerators from programming languages and investigates security issues related to microarchitectural features, including side-channel attacks.

Content

Keywords

Processors, Instruction Level Parallelism, Systems-on-Chip, Embedded Systems, High-Level Synthesis, Hardware Security.

Learning Prerequisites

Required courses

• CS-200 Computer Architecture

Important concepts to start the course

Undergraduate knowledge of digital circuit design and of computer architecture

Learning Outcomes

• Design strategies to exploit instruction level parallelism in processors.
• Contrast static and dynamic techniques for instruction level parallelism.
• Design effective processor (micro-)architectures for which efficient compilers can be written.
• Develop hardware accelerators competitive to best commercial processors
• Defend against security threats based on microarchitectural processor features

Teaching methods

Courses, labs, and compulsory homeworks.

Assessment methods

Homeworks

Final exam

Supervision

Resources

Virtual desktop infrastructure (VDI)

No

Bibliography

• John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufman, 6th edition, 2017.

Ressources en bibliothèque

• Find the references at the Library

Moodle Link

• https://go.epfl.ch/CS-470

Prerequisite for

• CS-471 Advanced Multiprocessor Architecture