EE-520 / 2 crédits

Enseignant: Enz Christian

Langue: Anglais


Summary

This course presents the design of low-power analog CMOS integrated circuits. The techniques are based on the concept of inversion coefficient that can be used as the main design parameter for the optimization of figures-of-merit applied to circuits including amplifiers, filters and oscillators.

Content

Keywords

Low-power, Analog, CMOS, Low-noise

Learning Prerequisites

Required courses

  • Basic circuit theory course.
  • Basic analog circuit design course.
  • Semiconductor device modeling course.
  • Basic analog integrated circuits design course.

 

Recommended courses

  • Analog filter design course.
  • Course on random processes and noise in devices and circuits.

Learning Outcomes

By the end of the course, the student must be able to:

  • Design low-power analog circuits
  • Optimize power and other figures-of-meritt
  • Analyze simple analog circuits
  • Dimension transistors of a given circuit to achieve desired specifications
  • Verify performace by simulations
  • Formalize analog circuit design procedure
  • Select appropriately the correct design parameters
  • Represent the trade-offs in an optimal way
  • Choose the correct operating point

Transversal skills

  • Use a work methodology appropriate to the task.
  • Continue to work through difficulties or initial failure to find optimal solutions.
  • Use both general and domain specific IT resources and tools

Teaching methods

Two hours weekly lecture

Expected student activities

In addition to studying the lecture notes the student will have to do some home work

Assessment methods

Written exam.

Resources

Bibliography

Device modeling:
[1] C. C. Enz and E. A. Vittoz, Charge-based MOS Transistor Modeling, Wiley, 2006.
[2] Y. Tsividis and C. Mc Andrew, Operation and Modeling of the MOS Transistor, 3rd ed., Oxford University Press, 2001.


CMOS IC design:
[3] T. C. Carusone, D. A. Johns, K. W. Martin, Analog Integrated Circuit Design, 2nd edition, Wiley, 2012.
[4] B. Razavi, Design of Analog CMOS Integrated Circuits, 2nd ed., Mc Graw Hill, 2017.
[5] W. Sansen, Analog Design Essentials, Springer, 2013.
[6] A. Sedra, K. Smith, Microelectronic Circuits, 7th edition, Oxford University Press, 2015.
[7] P. R. Gray, P. J. Hurst, S. H. Lewis and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed., Wiley, 2009.


Gm/ID design methodology:
[8] David Binkley, Tradeoffs and Optimization in Analog CMOS Design, Wiley, 2008.
[9] P. Jespers, B. Murmann, Systematic Design of Analog CMOS Circuits, Cambridge, 2017.
[10] P. Jespers, The Gm over ID Methodology, Springer, 2010.

Ressources en bibliothèque

Notes/Handbook

Slides will be provided on the moodle site.

Dans les plans d'études

  • Semestre: Automne
  • Forme de l'examen: Ecrit (session d'hiver)
  • Matière examinée: Low-power analog IC design
  • Cours: 2 Heure(s) hebdo x 14 semaines
  • Semestre: Automne
  • Forme de l'examen: Ecrit (session d'hiver)
  • Matière examinée: Low-power analog IC design
  • Cours: 2 Heure(s) hebdo x 14 semaines
  • Semestre: Automne
  • Forme de l'examen: Ecrit (session d'hiver)
  • Matière examinée: Low-power analog IC design
  • Cours: 2 Heure(s) hebdo x 14 semaines
  • Semestre: Automne
  • Forme de l'examen: Ecrit (session d'hiver)
  • Matière examinée: Low-power analog IC design
  • Cours: 2 Heure(s) hebdo x 14 semaines

Semaine de référence

 LuMaMeJeVe
8-9     
9-10     
10-11     
11-12     
12-13     
13-14     
14-15     
15-16     
16-17     
17-18     
18-19     
19-20     
20-21     
21-22