EE-431 / 4 credits

Teacher(s): Burg Andreas Peter, Levisse Alexandre Sébastien Julien

Language: English


Summary

In this project-based course, students collect hands-on experience with designing full-custom digital VLSI circuits in dynamic logic. They learn to carry out the design and optimization on transistor level, including logic and clock tree, the verification, and the layout.

Content

Keywords

VLSI, CMOS, transistor level, layout, adder, dynamic logic

Learning Prerequisites

Required courses

EE-429 Fundamentals of VLSI design
EE-490(b) Lab in EDA based design (or experience with CADENCE Virtuoso)

Learning Outcomes

By the end of the course, the student must be able to:

  • Compose a transistor-level integrated circuit
  • Analyze its performance
  • Anticipate layout effects
  • Design its layout

Teaching methods

Project based course with few lectures

Resources

Moodle Link

In the programs

  • Semester: Spring
  • Exam form: Written (summer session)
  • Subject examined: Advanced VLSI design
  • Lecture: 2 Hour(s) per week x 14 weeks
  • Exercises: 2 Hour(s) per week x 14 weeks
  • Semester: Spring
  • Exam form: Written (summer session)
  • Subject examined: Advanced VLSI design
  • Lecture: 2 Hour(s) per week x 14 weeks
  • Exercises: 2 Hour(s) per week x 14 weeks

Reference week

 MoTuWeThFr
8-9    CM1103
9-10    
10-11    CM1103
11-12    
12-13     
13-14     
14-15     
15-16     
16-17     
17-18     
18-19     
19-20     
20-21     
21-22     

Friday, 8h - 10h: Lecture CM1103

Friday, 10h - 12h: Exercise, TP CM1103

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